technical data in74hc640a octal 3-state inverting bus transceiver high-performance silicon-gate cmos ordering information in74hc640an plastic IN74HC640ADW soic t a = -55 to 125 c for all packages the in74hc640a is identical in pinout to the ls/als640. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compa tible with ls/alsttl outputs. the in74hc640a is a 3-state transceiver that is used for 2-way asynchronous communication between data buses. the device has an active-low output enable pin, which is used to place the i/o ports into high-impedance states. the direction control determines whether data flows from a to b or from b to a. ? outputs directly interf ace to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0 a ? high noise immunity characteristic of cmos devices pin assignment function table control inputs output enable direction operation l rev. 00 l data transmitted from bus b to bus a (inverted) l h data transmitted from bus a to bus b (inverted) h x buses isolated (high impedance state) x = don?t care logic diagram pin 20=v cc pin 10 = gnd
in74hc640a rev. 00 maximum ratings * symbol parameter value unit v cc dc supply voltage (referenced to gnd) -0.5 to +7.0 v v in dc input voltage (referenced to gnd) -1.5 to v cc +1.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output current, per pin 35 ma i cc dc supply current, v cc and gnd pins 75 ma p d power dissipation in still air, plastic dip+ soic package+ 750 500 mw tstg storage temperature -65 to +150 c t l lead temperature, 1 mm from case for 10 seconds (plastic dip or soic package) 260 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the reco mmended operating conditions. +derating - plastic dip: - 10 mw/ c from 65 to 125 c soic package: : - 7 mw/ c from 65 to 125 c recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 2.0 6.0 v v in , v out dc input voltage, output voltage (referenced to gnd) 0 v cc v t a operating temperature, all package types -55 +125 c t r , t f input rise and fall time (figure 1) v cc =2.0 v v cc =4.5 v v cc =6.0 v 0 0 0 1000 500 400 ns this device contains protection circuitry to guard agains t damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage highe r than maximum rated voltages to this high-impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. i/o pins must be connected to a properly terminated line or bus.
in74hc640a rev. 00 dc electrical characteristics (voltages referenced to gnd) v cc guaranteed limit symbol parameter test conditions v 25 c to -55 c 85 c 125 c unit v ih minimum high- level input voltage v out =0.1 v or v cc -0.1 v ?i out ? 20 a 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 v v il maximum low - level input voltage v out =0.1 v or v cc -0.1 v ?i out ? 20 a 2.0 4.5 6.0 0.3 0.9 1.2 0.3 0.9 1.2 0.3 0.9 1.2 v v oh minimum high- level output voltage v in =v ih or v il ?i out ? 20 a 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 v v in =v ih or v il ?i out ? 6.0 ma ?i out ? 7.8 ma 4.5 6.0 3.98 5.48 3.84 5.34 3.7 5.2 v ol maximum low- level output voltage v in = v il or v ih ?i out ? 20 a 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v il or v ih ?i out ? 6.0 ma ?i out ? 7.8 ma 4.5 6.0 0.26 0.26 0.33 0.33 0.4 0.4 i in maximum input leakage current v in =v cc or gnd, pin 1 or 19 6.0 0.1 1.0 1.0 a i oz maximum three- state leakage current output in high-impedance state v in = v il or v ih v out =v cc or gnd 6.0 0.5 5.0 10 a i cc maximum quiescent supply current (per package) v in =v cc or gnd i out =0 a 6.0 4.0 40 160 a
in74hc640a ac electrical characteristics (c l =50pf,input t r =t f =6.0 ns) v cc guaranteed limit symbol parameter v 25 c to -55 c 85 c 125 c unit t plh , t phl maximum propagation delay, a to b , b to a (figures 1 and 3) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns t plz , t phz maximum propagation delay , direction or output enable to a or b (figures 2 and 4) 2.0 4.5 6.0 110 22 19 140 28 24 165 33 28 ns t pzl , t pzh maximum propagation delay , direction or output enable to a or b (figures 2 and 4) 2.0 4.5 6.0 110 22 19 140 28 24 165 33 28 ns t tlh , t thl maximum output transition time, any output (figures 1 and 3) 2.0 4.5 6.0 60 12 10 75 15 13 90 18 15 ns c in maximum input capacitance (pin 1 or pin 19) - 10 10 10 pf c out maximum three-state i/o capacitance (output in high-impedance state) - 15 15 15 pf power dissipation capacitance (per transceiver channel) rev. 00 typical @25 c,v cc =5.0 v c used to determine the no-load dynamic power consumption: p 40 pf pd d =c pd v cc 2 f+i cc v cc figure 1. switching waveforms figure 2. switching waveforms
in74hc640a figure 3. test circuit figure 4. test circuit expanded logic diagram rev. 00
in74hc640a rev. 00 n suffix plastic dip (ms - 001ad) symbol min max a 24.89 26.92 b 6.1 7.11 c 5.33 d 0.36 0.56 f 1.14 1.78 g h j 0 10 k 2.92 3.81 notes: l 7.62 8.26 1. dimensions ?a?, ?b? do not include mold flash or protrusions. m 0.2 0.36 maximum mold flas h or protrus ions 0.25 mm (0.010) per s ide. n 0.38 d suffix soic (ms - 013ac) symbol min max a 12.6 13 b 7.4 7.6 c 2.35 2.65 d 0.33 0.51 f 0.4 1.27 g h notes: j 0 8 1. dimensions a and b do not include mold flash or protrusion. k 0.1 0.3 2. maximum mold flash or protrusion 0.15 mm (0.006) per side m 0.23 0.32 for a; for b ? 0.25 mm (0.010) per s ide. p 10 10.65 r 0.25 0.75 dimens ion, mm 1.27 9.53 dimens ion, mm 2.54 7.62 a b h c k c m j f m p g d r x 45 seating plane 0.25 (0.010) m t -t- 1 20 10 11 l h m j a b f g d seating plane n k 0.25 (0.010) m t -t- c 1 20 10 11
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